The invention relates to a method of manufacturing a semiconductor device whereby a layer of insulating material and a layer of polycrystalline silicon are provided on a surface of a monocrystalline silicon wafer, whereupon consecutively the layer of polycrystalline silicon is provided with a window, a protective layer is provided on the wall of said window, the layer of insulating material is removed from the surface of the silicon wafer within the window and below an edge of the layer of polycrystalline silicon adjoining the window, and silicon is selectively deposited from a vapor at reduced pressure on the monocrystalline and polycrystalline silicon exposed in and adjacent the window.
During the deposition of the silicon, this semiconductor material grows epitaxially in monocrystalline form on the exposed monocrystalline silicon and in polycrystalline form on the polycrystalline silicon exposed adjacent the window. The grown monocrystalline silicon forms a semiconductor zone which together with the monocrystalline silicon of the wafer forms a semiconductor junction. This semiconductor zone is connected to the layer of polycrystalline silicon situated adjacent the window by the grown polycrystalline silicon.
Since the selective deposition of silicon is carried out at a reduced pressure, a smooth layer of homogeneous thickness is obtained. The method may be used for forming semiconductor devices with sub-micron dimensions.
The method may be used, for example, for making a bipolar transistor with an emitter formed by polycrystalline silicon. Such a transistor is sometimes called "poly-emitter transistor". The grown monocrystalline silicon then forms the base of the transistor which is contacted by the grown polycrystalline silicon and the layer of polycrystalline silicon. The wafer forms the collector of the transistor. The grown monocrystalline silicon then forms the collector-base junction together with the wafer. After the selective deposition, a further layer of polycrystalline silicon is deposited which forms the emitter of the transistor. This further layer of polycrystalline silicon forms the base-emitter junction together with the layer of selectively deposited monocrystalline silicon in the window. Dopants required in the base and the emitter may be provided either after the deposition thereof or during the deposition thereof in the manufacture of the transistor. The wafer may be provided with the required dopant before the deposition of the layers of insulating material and polycrystalline silicon.
The method may also be used for making a MOS transistor. In that case a layer of gate dielectric is provided on the grown monocrystalline silicon within the window, for example by oxidation. Subsequently, a further layer of polycrystalline silicon is again deposited, in this case forming the gate electrode of the transistor.
A method of the kind mentioned in the opening paragraph is known from "A Self-Aligned Selective MBE Technology for High-Performance Bipolar Transistors", F. Sato et al., Proceedings IEEE, 1990, 25.7.1-4, whereby the silicon is selectively deposited from a vapor comprising disilane (Si.sub.2 H.sub.6) at a pressure of 2.times.10.sup.-5 torr and a temperature of 560.degree. C.
The selective deposition of silicon is carried out at a very low pressure in the known method. When silicon is deposited from a vapor of disilane at a higher pressure, the process is non-selective and silicon is deposited also on the insulating layer. A very complicated and expensive equipment is necessary for carrying out a deposition at said low pressure.